This invention relates to digital data receiving apparatus for receiving a data modulated carrier signal.
The invention has a particuar application where the data is transmitted in phase shift keyed (PSK) or quadrature amplitude modulation (QAM) form.
In current high speed digital modems, especially in multi-point networks, the effective data throughput is highly dependent on the start-up time of the modem receiver. Thus, it is advantageous that the start-up time should be as short as possible.
Current high speed modems may operate at speeds as high as 9600 bps (bits per second). With such high speed modems, the amplitude and delay distortion experienced on telephone lines are much larger than with lower speed modems, because of the considerably broader band-width they use. Also, because of the higher sensitivity to any kind of disturbance of such modems, it is desirable to achieve fast and accurate receiver timing synchronization, prior to initialization of the modem equalizer.
From U.S. Pat. No. 4,039,748, there is known a receiver for receiving digital data, including a synchronization device for adjusting the phase of sampling clock signals. In one embodiment disclosed in the U.S. Pat. No. 4,039,748, an initialization sequence consisting of a series of values +1, -1, +1 . . . is utilized by a synchronization device, which includes a pair of narrow band recursive filters, to provide for initial receiver timing synchronization. The known apparatus has the disadvantage that the synchronization device is slow to achieve accurate timing initialization; that is, the device suffers from so-called turn-on effects.